The Semiconductor Integrated Circuits Layout-Design Act, 2000 (SICLD) provide statutory protection for original layout-designs. SICLD Act is a sui-generis legislation specifically meant for protecting intellectual property rights relating to Layout-Design (Topographies) of Semiconductor Integrated Circuit.
The Act defines Layout-design as meaning a layout of transistors and other circuitry elements and includes lead wires connecting such elements and expressed in any manner in a semiconductor integrated circuit (IC).
The Act defines Semiconductor integrated circuit as meaning a product having transistors and other circuitry elements which are inseparably formed on a semiconductor material or an insulating material or inside the semiconductor material and designed to perform an electronic circuitry function.
Under the Act, only the Layout-Design is protected. In other words, only the mask layout or floor planning of the integrated circuits can be registered under the Act. It does not protect other information like any idea, procedure, process, system, programme stored in the integrated circuit, method of operation etc.
Definition of original layout-design: A layout-design shall be considered to be original if it is the result of its creator’s own intellectual effort and is not commonly known to the creators of layout-designs and manufacturers of integrated circuits at the time of its creation. Further, a layout-design consisting of such combination of elements and interconnections that are commonly known among creators of layout-designs and manufacturers of semiconductor integrated circuits shall be considered as original if such combination taken as a whole is the result of its creator’s own intellectual efforts
Proviso: Design not exploited commercially for more than 2 years from date of registration of application shall be treated as not commercially exploited for the purpose of this Act.
Applicant for registration of Integrated Circuits and Layout Designs: Any person claiming to the creator of a layout design can make an application in prescribe manner for registration of layout design.
Application for registration of Integrated Circuits and Layout Designs can be made in the Integrated Circuits Layout-Design Registry of India, New Delhi.
Term of a IC layout design: The term of an IC layout design protection is 10 years from the date of filing an application for registration or from the date of first commercial exploitation anywhere in any country whichever is earlier.
Rights conferred by registration of a IC layout design: The registration of a layout-design gives the registered proprietor of the layout-design an exclusive right to the use of the layout-design and obtain relief in respect of any infringement.
Infringement of Integrated Circuits and Layout Designs: A registered layout-design is infringed if any person other than registered proprietor does any act of reproducing, importing, selling, distributing the IC layout design for commercial purposes.
A person when reproduced a registered layout design for the limited purpose of scientific evaluation, analysis, research or teaching, it does not amount infringement of said registered layout design.
An infringement of a Layout-Design is a criminal offence under the Act. Infringement of a registered layout design has been made punishable under the Act with imprisonment of up to three years or fine of Rs 50,000 (approx. US$ 750) up to maximum of Rs 10,00,000 (approx. US$ 15,000), or with both.
There is no remedy available under the Act to institute any proceeding to prevent, or to recover damages for the infringement of an unregistered layout-design.
For any specific query related to Semiconductor Integrated Circuits and Layout Designs Law and Procedure in India, please contact us at ip@avntltech.com
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